Many respondents offered feedback as to which incentives worked best to encouraging and improve IP reuse.
- The incentive cited most often was the resource reduction and the shortened time to market from having an effective process and technology system in place.
- Multiple respondents said that formal planning and processes were a strong incentive.
- Other incentives included clear ownership, encouragement to participate, and having a culture valuing IP reuse.
Some respondents cited obstacles to avoid in gaining team commitment to IP reuse. They commented that management understanding and commitment was a critical element, with an upfront IP roadmap and planning.
They noted that insufficient methodology guidelines and rules can make reuse difficult or impossible, yet reuse design guidelines on their own were inadequate without the corresponding infrastructure. Multiple people commented that an obstacle to success was the lack of a proper technology infrastructure to facilitate IP reuse.
IP-based design is a dominant methodology today, encompassing new design as well as internal and third party IP reuse. The specific goal of IP reuse is that designers find the IP they need, plug it in, and it works. To ensure that IP reuse takes less time than creating and verifying new content, it must address both the design and the verification elements. This creates a complex dependency management and communication requirement, spanning designers, verification teams, project leads, and CAD and engineering management.
Effective IP reuse requires both a technology infrastructure and clear management processes. An easy to deploy IP reuse dependency management system, with appropriate top-down direction and incentives, will motivate team members to participate. Finally, the top incentive for team member participation is to directly experiencing the efficiency and time to market advantages from their first effort.
A major goal of IP reuse dependency management is to have a higher return on assets. Users found improvements of approximately 30 percent in both resource reductions and improved time to market.
About IC Manage
IC Manage provides high performance design data and IP management solutions for companies to efficiently collaborate on single and multi-site designs. IC Manage lets designers dynamically track, control and distribute library, block-level and SOC design data, including configurations and properties. Design teams can improve product quality, designer productivity, team collaboration, bug dependency tracking, plus maximize IP reuse. IC Manage is headquartered at 2105 South Bascom Ave., Suite 120, Campbell, CA. For more information visit us at www.icmanage.com.
Shiv Sikand, Vice President of Engineering, IC Manage
Shiv founded IC Manage in 2003, and has been instrumental in the company achieving technology leadership in high performance design and IP management solutions. Prior to IC Manage, Shiv was at Matrix Semiconductor, where he worked on the world’s first 3D memory chips.
Shiv also worked at MIPS, where he led the development of the MIPS Circuit Checker (MCC). While working on the MIPS processor families at SGI, Shiv created and deployed cdsp4, the Cadence-Perforce integration, which he later open sourced. Cdsp4 provided the inspiration and architectural testing ground for IC Manage. Shiv received his BSc and MSc degrees in Physics and Electrical Engineering from the University of Manchester Institute of Science and Technology.