IP Reuse. Delivered.

IC Manage Global Design Platform (GDP) includes an open platform for maximizing IP reuse.Design and verification teams can use IP Central to rapidly publish and integrate IP into existing flows, and to trace bug dependencies. Internal and third party IP can be imported or linked with IP Central from multiple commercial and open source design management systems, as well as
internal revision control systems. ”

IC Manage’s IP Central Key Features IP Central is an open and scalable platform to rapidly publish and reuse internal and third party IP in SoC, IC and FGPA designs across the enterprise.

Create & Publish IP

Create & Publish IP via a check-list driven flow with encapsulated IP and property data, such as design data, bugs, assertions, constraints, and electrical and simulation parameters. An IP can be marked as completed or verified, based on rules or metrics.

Import or Link IP Data

Import or Link IP data from multiple commercial and open source design management systems and internal databases and file systems to create a central view of IP assets.

Integrate IP Data

Integrate IP data by automatically mapping directory based data into structured forma

Search & Select IP

Search and Select IP by fully configurable, dynamic specifications. e.g. find objects that are of type PLL, 0.13 micron, 2100 MHz, Verilog, GDSII, LEF, DRC and LVS clean. Can also link to external IP catalogs.

Manage IP Bugs

Manage IP Bugs by identifying the bugs, tracing bug dependencies and propagating fixes.

Track IP

Track IP via incremental capabilities, as compared to static tar ball or stagnant bill of materials models. IP Central’s visual analytics allow for easier tracking of IP usage and interdependencies.

IC Manage GDP IP Reuse Functionality Benefits

By automating the tedious and time-consuming process of publishing and managing a company’s IP and all its associated properties, IC Manage’s GDP-IP Central allows design and verification teams to finally reap the benefits of IP reuse a timely and resource efficient manner.

IP Producers can easily publish IP via a checklist-driven flow with the IP properties encapsulated. Producers can identify what chip the IP they support is being used in, which designers are using it, and the IP version they are using.

Managers can set permissions for IP usage in a secure manner, track exactly where theIP is being used, and control usage of selected IP.

IP Consumers can search for IP according to complex specifications, view all IP properties, understand the status, and manage bugs.
Design and verification teams can finally reap the benefits of IP reuse a timely and resource efficient manner, through GDP’s automation of the tedious and time- consuming process of publishing and managing a company’s IP and all its associated properties.